1. Field of the Invention
The present invention relates to a data processor, and to a method for accessing a memory. More particularly, it relates to a data processor including a flash memory, and to a method for accessing the flash memory.
2. Description of Related Art
As a nonvolatile memory mounted on a semiconductor device such as a microcomputer, a flash memory and an electrically erasable programmable read-only memory (EEPROM) are known. A flash memory and an EEPROM are different from each other in terms of a unit of data erasing, the number of rewritable times, a circuit area, and the like.
For example, the unit of data erasing of the flash memory is block-based while that of the EEPROM is bit-based. Further, the number of rewritable times of the flash memory is around 100 to 1,000, while that of the EEPROM is around 10,000 to 100,000. In essence, the EEPROM is superior to the flash memory from the viewpoint of the unit of data erasing and the number of rewritable times. On the other hand, the flash memory is by far superior to the EEPROM from the viewpoint of the circuit area.
Thus, a proposition has been made to mount both a flash memory and an EEPROM on a semiconductor device, and to use either the flash memory or the EEPROM according to a record data. For example, the flash memory is used when a data amount is large, or when data is to be rewritten only with low frequency. On the other hand, the EEPROM is used when a data amount is small, or when data is to be rewritten with high frequency.
To mount both a flash memory and an EEPROM on a semiconductor device, however, results in a large disadvantage from the viewpoint of a manufacturing process and a manufacturing cost. Accordingly, there is proposed a technique in which only a flash memory is mounted on a semiconductor device, and a part of the flash memory is treated like an EEPROM (refer to JP-A-2006-260468 and JP-A-2007-172259). A technique of using a part of a flash memory like an EEPROM is generally called an “EEPROM emulation.”
When data in a memory cell of a flash memory is rewritten, new data cannot be written unless data stored in the memory cell is erased. Here, data in a flash memory is erased in units of blocks. Thus, in a usual flash memory, certain data in a certain block needs to be rewritten after all data in the block is erased. In the EEPROM emulation, data is basically not rewritten. Instead, new data is additionally written to a free space (unused space) to which no data has been written yet. Then, when an allocated block is full, record data in the block is erased in a lump. Thereby, the number of rewriting times for one memory cell is reduced, and thus apparently increasing the number of rewritable times approximately to that of an EEPROM.
In the EEPROM emulation, a specific memory access method is required in order to write new data to a free space, and to read the latest data of data accumulated by addition. Hereinafter, a memory access method stated in JP-A-2006-260468 will be described with reference to FIG. 1.
As shown in FIG. 1, a flash memory has multiple blocks. Of these, a block B1 is used as a data length storage space. The data length storage space stores therein information on correspondence relations between identifiers (e.g., ID1, ID2, ID3) of multiple types of data and data lengths thereof, respectively. Meanwhile, blocks Bm to Bn are used as data storage spaces for storing the data. In each data storage space, multiple types of data D1 to D3 are stored together with their respective identifiers ID1 to ID3. A space where a certain data and its identifier are stored is referred to as a “section.”
At the time of accessing the data storage space, “skip processing” is performed. Specifically, an identifier stored in a head section is firstly read. Subsequently, a data length corresponding to the identifier thus read is obtained by referring to the information stored in the data length storage space. An address to be accessed is shifted by the data length thus obtained, thereby enabling an access to a next section without reading of data stored in the head section. This is the “skip processing”.
By repeatedly performing skip processing, the head of a free space in the data storage space can be detected. At the time of data writing, new data and its identifier are added to the head of the free space thus detected, so that a new section is formed. At the time of data reading, it is necessary to read the latest version (i.e., one stored in the last address) of a type of data that is a “reading target”. To do this, when an identifier is read from a certain section in the skip processing, it is determined whether or not this identifier matches the identifier of the reading target. If the identifiers match, then an address of the reading target is updated with the address of the section. When a free space is detected by repeatedly performing the skip processing, the address of the reading target held at this time indicates the address of the latest data of the reading target. Accordingly, the latest data is read by returning to the address of the reading target.